System parameter trace and test coverage optimization in a computer system

ABSTRACT

In an example, a computer system includes: a hardware platform including a processor, system memory, and a plurality of input/output (IO) devices, the processor including a controller having a trace and optimize function controller (TOF); and a software platform including an operating system (OS) executing on the hardware platform; wherein the TOF is configured to communicate with the processor, the system memory, and the plurality of IO devices to obtain current settings thereof and to determine final settings for the processor, the system memory, and the plurality of IO devices based on the current settings; and wherein the controller is configured to control the processor, the system memory, and the plurality of IO devices based on the final settings.

BACKGROUND

The present invention relates to computer systems, and morespecifically, to tracing system parameters and optimizing test coveragein a computer system.

Computer systems include various software and hardware components forcontrolling power, performance, and thermal characteristics. While somecomponents may be in communication, other components may be“out-of-band.” Such out-of-band components control some settingsindependent of other components. This can lead to a scenario where anout-of-band component attempts to control a particular setting for agiven test purpose, while other component(s) override the setting in anundesirable manner during the testing. Further, particular settings fortesting one component are not necessarily optimal for testing anothercomponent. For example, memory characterization settings do notguarantee optimal settings for processor and IO. Processorcharacterization settings do not guarantee optimal settings for memoryand IO. IO characterization settings do not guarantee optimal settingsfor processor and memory. This leads to a multi-dimensional engineeringproblem of assuring desirable margin levels of interfaces, circuits,sub-systems, and at a system level, in light of workloads, including butnot limited to packaging, electrical, and thermal aspects.

SUMMARY

According to one embodiment of the present invention, a computer systemincludes: a hardware platform including a processor, system memory, anda plurality of input/output (IO) devices, the processor including acontroller having a trace and optimize function controller (TOF); and asoftware platform including an operating system (OS) executing on thehardware platform; wherein the TOF is configured to communicate with theprocessor, the system memory, and the plurality of IO devices to obtaincurrent settings thereof and to determine final settings for theprocessor, the system memory, and the plurality of IO devices based onthe current settings; and wherein the controller is configured tocontrol the processor, the system memory, and the plurality of IOdevices based on the final settings.

In another embodiment, a method of controlling devices in a computersystem, the computer system including a hardware platform including aprocessor, system memory, and a plurality of input/output (IO) devices,the processor including a controller having a trace and optimizefunction controller (TOF), the method including: communicating, by atrace and optimize function controller (TOF) in the controller, with theprocessor, the system memory, and the plurality of IO devices to obtaincurrent settings thereof; determining, by the TOF, final settings forthe processor, the system memory, and the plurality of IO devices basedon the current settings; and controlling, by the controller, theprocessor, the system memory, and the plurality of IO devices based onthe final settings.

In another embodiment, a computer program product for controllingdevices in a computer system, the computer system including a hardwareplatform including a processor, system memory, and a plurality ofinput/output (IO) devices, the processor including a controller having atrace and optimize function controller (TOF), the computer programproduct including: a computer-readable storage medium havingcomputer-readable program code embodied therewith, the computer-readableprogram code executable by one or more computer processors to:communicate, by a trace and optimize function controller (TOF) in thecontroller, with the processor, the system memory, and the plurality ofIO devices to obtain current settings thereof; determine, by the TOF,final settings for the processor, the system memory, and the pluralityof IO devices based on the current settings; and control, by thecontroller, the processor, the system memory, and the plurality of IOdevices based on the final settings.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

FIG. 1 is a block diagram depicting a computer according to an example.

FIG. 2 is a block diagram depicting an on-chip controller according toan example.

FIG. 3 is a flow diagram depicting a method of operation of a trace andoptimize function controller (TOF) according to an embodiment.

FIG. 4 is a flow diagram depicting a method of operation of a trace andoptimize function controller (TOF) according to another embodiment.

DETAILED DESCRIPTION

FIG. 1 is a block diagram depicting a computer 100 according to anexample. The computer 100 includes a hardware platform (“hardware 104”)and a software platform (“software 106”) executing on the hardware 104.The hardware 104 includes a processor 110, an on-chip controller (OCC)115, system memory 116, input/output (IO) storage devices 118, firmware120, power measurement device(s) (“power measurement 126”), voltageregulation modules (VRMs) 124, and a baseboard management controller(BMC) 122. The software 106 includes an operating system (OS) 144, testtools 150, and custom utilities 152. In an embodiment, the OCC 115 isseparate from the processor 110 as shown in FIG. 1. In anotherembodiment, the OCC 115 may be part of the processor 110.

The processor 110 includes one or more microprocessor cores (“cores112”) and support circuits 114. The cores 112 can be any type ofgeneral-purpose central processing unit (CPU), such as an IBMPOWER-based processor, an x86-based processor, ARM-based processor, orthe like. The cores 112 can include associated circuitry (e.g., cachememories, memory management units (MMUs), interrupt controllers, etc.).The cores 112 are configured to execute program code that can performone or more operations described herein and which can be stored in thesystem memory 116. The support circuits 114 include various devices thatcooperate with the cores 112 to manage data flow between the cores 112,the system memory 116, the IO devices 118, or any other peripheraldevice. For example, the support circuits 114 can include a northbridge, south bridge, platform host controller, peripheral bus, and thelike. In some examples, all or a substantial portion of thefunctionality of the chipset (e.g., north bridge, south bridge, etc.)can be disposed in a separate integrated circuit (IC) within thehardware 104.

The system memory 116 is a device allowing information, such asexecutable instructions and data, to be stored and retrieved. The systemmemory 116 can include, for example, one or more random access memory(RAM) modules, such as double-data rate (DDR) dynamic RAM (DRAM). The IOdevices 118 can include any type of peripheral device, such as networkinterface cards (NICs) and local storage devices (e.g., one or more harddisks, flash memory modules, solid state disks, and optical disks)and/or a storage interface that enables the computer 100 to communicatewith one or more network data storage systems. The hardware 104 caninclude various other conventional devices and peripherals of acomputing system, such as graphics cards, universal serial bus (USB)interfaces, and the like.

The firmware 120 can be stored in a non-volatile memory (NVM) or anytype of non-volatile storage device. The firmware 120 can includevarious functions, such as code for initializing devices (e.g., theprocessor 110, the system memory 116, etc.), booting the OS 144, and thelike, as well as one or more interfaces for controlling and configuringsome or all of the functions (e.g., a Unified Extensible FirmwareInterface (UEFI) or the like). The power measurement 126 is configuredto monitor and report on power consumption of various devices in thecomputer 100 (e.g., the processor 110, the system memory 116, the IOdevices 118, etc.). The VRMs 124 comprise voltage regulators and thelike for regulating and controlling voltage of various rails in thecomputer 110 used by the processor 110, the system memory 116, and theIO devices 118. The BMC 122 is configured to perform various managementfunctions, such as turning system power rails on and off, booting thecomputer 100, providing access to the firmware 120, setting fan speeds,powering off the computer 100 in response to over-temperature or otherpotentially catastrophic events, and the like. The OCC 115 is configuredto monitor and control system power, chip temperatures, and the like.

The OS 144 can be any commodity operating system known in the art, suchas such as LINUX, Microsoft Windows®, Mac OS®, or the like. The testtools 150 are configured for testing various devices in the computer100, such as processor 110, the system memory 116, the IO devices 118,and the like. The custom utilities 152 are configured to control somecharacteristics of the computer 100, such as a custom utility forcontrolling the voltage used by the processor 110, the voltage used bythe system memory 116, the voltage used by an IO device 118, or thelike.

In operation, the OCC 115 reads and controls system power and integratedcircuit (IC) temperatures. The OCC 115 provides for power capping, faulttolerance, energy saving, and performance boosts. The OCC 115communicates with the BMC 122 and the OS 144 to obtain user settings,and communicates with various devices in the system for control.

One of more of the custom utilities 152 can control various devices inthe system out-of-band with respect to the OCC 115 (e.g., withoutupdating or communicating with the OCC 115). For example, one of thecustom utilities 152 can be configured to slew the voltage rails of theprocessor 110 and the system memory 116 (e.g., used during memorycharacterization). Although the custom utilities 152 are shown as partof the software platform 106, one or more of the custom utilities 152can be part of the firmware 120. Further, one or more of the customutilities 152 can be executed prior to booting of the OS 144. Afterbooting of the OS 144, one or more test tools 150 may be executed tocontinue testing. Over time, the OCC 115 begins controlling processorand memory voltages, disturbing the settings of the custom utility. Assuch, the test tools 150 perform tests with an unintended setting of theprocessor/memory voltage. In an embodiment, such a scenario is avoidedby the OCC 115, which includes a trace and optimize function asdescribed further herein.

FIG. 2 is a block diagram depicting the OCC 115 according to anembodiment. The OCC 115 includes a processor 210, a memory 216, firmware220, support circuits 208, and a trace and optimize function (TOF) 206.The firmware 220 stores software of the OCC 115 in a nonvolatile memory.The processor 210 executes the firmware 220 and stores and retrievesdata/code in the memory 216. The support circuits 208 include variousinterfaces to the devices in the system for obtaining measurements andfor setting parameters (e.g., voltage, frequency, etc.). The TOF 206 isconfigured to assess the settings of the various devices in the systemand to apply the settings to establish system characterization settings.The TOF 206 includes two modes of operation to support optimal systemassurance testing. In a first mode (e.g., a trace mode), the TOF 206 isconfigured to obtain settings from the various devices as input andpropagate the settings to other system components. In the trace mode,the TOF 206 processes responses from the various devices to determine apossible operating settings that account for various parameters, such aspower, thermal, stress, coverage, traffic, and the like. In the secondmode (e.g., an optimize mode), the TOF 206 is configured to determinefinal settings and propagate the final settings to the various devicesto establish operating settings. In this manner, the TOF 206synchronizes the operating settings across all devices. The TOF 206 canmeasure parameters of interest periodically and ensure that theparameters are attained or maintained. If not, the TOF 206 can notifythat some control action is required to revisit existing settings and/orfurther optimizing the settings.

FIG. 3 is a flow diagram depicting a method 300 of operation of the TOF206 according to an embodiment. In the embodiment, the BMC 122 receivesuser settings 302. For example, the user can access the BMC 122 andprovide various settings for controlling the devices in the system(e.g., power, frequency, etc.). During operation, the OCC 115 functionsas described above to measure and control the devices. The TOF 206 isconfigured to first execute the trace mode and obtains settings from thedevices (e.g., the processor 110, the system memory 116, the IO devices118). The TOF 206 combines the retrieved settings to provide possibleoperating settings. The TOF 206 then enters the optimize mode, where theTOF 206 determines optimal settings 304 for the devices. The TOF 206provides the optimal settings 304 to the OCC 115, which controls thedevices accordingly (e.g., the processor 110, the system memory 116, theIO devices 118). The OCC 115 can communicate with the OS 144 to providethe optimal settings 304. In this manner, even if a device is controlledout-of-band by a particular utility, the out-of-band setting isconsidered by the TOF 206 and accounted for in the optimal settings 304.The TOF 206 prevents the OCC 115 from overriding such out-of-bandsettings, which may be employed during testing as described above.

FIG. 4 is a flow diagram depicting a method 400 of operation of the TOF206 according to another embodiment. In the embodiment, the OS 144receives the user settings 302. For example, the user can configure theOS 114 and provide various settings for controlling the devices in thesystem (e.g., power, frequency, etc.). During operation, the OCC 115functions as described above to measure and control the devices. The TOF206 is configured to first execute the trace mode and obtains settingsfrom the devices (e.g., the processor 110, the system memory 116, the IOdevices 118). The TOF 206 combines the retrieved settings to providepossible operating settings. The TOF 206 then enters the optimize mode,where the TOF 206 determines optimal settings 304 for the devices. TheTOF 206 provides the optimal settings 304 to the OCC 115, which controlsthe devices accordingly (e.g., the processor 110, the system memory 116,the IO devices 118). In this manner, even if a device is controlledout-of-band by a particular utility, the out-of-band setting isconsidered by the TOF 206 and accounted for in the optimal settings 304.The TOF 206 prevents the OCC 115 from overriding such out-of-bandsettings, which may be employed during testing as described above.

The descriptions of the various embodiments of the present inventionhave been presented for purposes of illustration, but are not intendedto be exhaustive or limited to the embodiments disclosed. Manymodifications and variations will be apparent to those of ordinary skillin the art without departing from the scope and spirit of the describedembodiments. The terminology used herein was chosen to best explain theprinciples of the embodiments, the practical application or technicalimprovement over technologies found in the marketplace, or to enableothers of ordinary skill in the art to understand the embodimentsdisclosed herein.

In the following, reference is made to embodiments presented in thisdisclosure. However, the scope of the present disclosure is not limitedto specific described embodiments. Instead, any combination of thefollowing features and elements, whether related to differentembodiments or not, is contemplated to implement and practicecontemplated embodiments. Furthermore, although embodiments disclosedherein may achieve advantages over other possible solutions or over theprior art, whether or not a particular advantage is achieved by a givenembodiment is not limiting of the scope of the present disclosure. Thus,the following aspects, features, embodiments and advantages are merelyillustrative and are not considered elements or limitations of theappended claims except where explicitly recited in a claim(s). Likewise,reference to “the invention” shall not be construed as a generalizationof any inventive subject matter disclosed herein and shall not beconsidered to be an element or limitation of the appended claims exceptwhere explicitly recited in a claim(s).

Aspects of the present invention may take the form of an entirelyhardware embodiment, an entirely software embodiment (includingfirmware, resident software, microcode, etc.) or an embodiment combiningsoftware and hardware aspects that may all generally be referred toherein as a “circuit,” “module” or “system.”

The present invention may be a system, a method, and/or a computerprogram product. The computer program product may include a computerreadable storage medium (or media) having computer readable programinstructions thereon for causing a processor to carry out aspects of thepresent invention.

The computer readable storage medium can be a tangible device that canretain and store instructions for use by an instruction executiondevice. The computer readable storage medium may be, for example, but isnot limited to, an electronic storage device, a magnetic storage device,an optical storage device, an electromagnetic storage device, asemiconductor storage device, or any suitable combination of theforegoing. A non-exhaustive list of more specific examples of thecomputer readable storage medium includes the following: a portablecomputer diskette, a hard disk, a random access memory (RAM), aread-only memory (ROM), an erasable programmable read-only memory (EPROMor Flash memory), a static random access memory (SRAM), a portablecompact disc read-only memory (CD-ROM), a digital versatile disk (DVD),a memory stick, a floppy disk, a mechanically encoded device such aspunch-cards or raised structures in a groove having instructionsrecorded thereon, and any suitable combination of the foregoing. Acomputer readable storage medium, as used herein, is not to be construedas being transitory signals per se, such as radio waves or other freelypropagating electromagnetic waves, electromagnetic waves propagatingthrough a waveguide or other transmission media (e.g., light pulsespassing through a fiber-optic cable), or electrical signals transmittedthrough a wire.

Computer readable program instructions described herein can bedownloaded to respective computing/processing devices from a computerreadable storage medium or to an external computer or external storagedevice via a network, for example, the Internet, a local area network, awide area network and/or a wireless network. The network may comprisecopper transmission cables, optical transmission fibers, wirelesstransmission, routers, firewalls, switches, gateway computers and/oredge servers. A network adapter card or network interface in eachcomputing/processing device receives computer readable programinstructions from the network and forwards the computer readable programinstructions for storage in a computer readable storage medium withinthe respective computing/processing device.

Computer readable program instructions for carrying out operations ofthe present invention may be assembler instructions,instruction-set-architecture (ISA) instructions, machine instructions,machine dependent instructions, microcode, firmware instructions,state-setting data, or either source code or object code written in anycombination of one or more programming languages, including an objectoriented programming language such as Smalltalk, C++ or the like, andconventional procedural programming languages, such as the “C”programming language or similar programming languages. The computerreadable program instructions may execute entirely on the user'scomputer, partly on the user's computer, as a stand-alone softwarepackage, partly on the user's computer and partly on a remote computeror entirely on the remote computer or server. In the latter scenario,the remote computer may be connected to the user's computer through anytype of network, including a local area network (LAN) or a wide areanetwork (WAN), or the connection may be made to an external computer(for example, through the Internet using an Internet Service Provider).In some embodiments, electronic circuitry including, for example,programmable logic circuitry, field-programmable gate arrays (FPGA), orprogrammable logic arrays (PLA) may execute the computer readableprogram instructions by utilizing state information of the computerreadable program instructions to personalize the electronic circuitry,in order to perform aspects of the present invention.

Aspects of the present invention are described herein with reference toflowchart illustrations and/or block diagrams of methods, apparatus(systems), and computer program products according to embodiments of theinvention. It will be understood that each block of the flowchartillustrations and/or block diagrams, and combinations of blocks in theflowchart illustrations and/or block diagrams, can be implemented bycomputer readable program instructions.

These computer readable program instructions may be provided to aprocessor of a general purpose computer, special purpose computer, orother programmable data processing apparatus to produce a machine, suchthat the instructions, which execute via the processor of the computeror other programmable data processing apparatus, create means forimplementing the functions/acts specified in the flowchart and/or blockdiagram block or blocks. These computer readable program instructionsmay also be stored in a computer readable storage medium that can directa computer, a programmable data processing apparatus, and/or otherdevices to function in a particular manner, such that the computerreadable storage medium having instructions stored therein comprises anarticle of manufacture including instructions which implement aspects ofthe function/act specified in the flowchart and/or block diagram blockor blocks.

The computer readable program instructions may also be loaded onto acomputer, other programmable data processing apparatus, or other deviceto cause a series of operational steps to be performed on the computer,other programmable apparatus or other device to produce a computerimplemented process, such that the instructions which execute on thecomputer, other programmable apparatus, or other device implement thefunctions/acts specified in the flowchart and/or block diagram block orblocks.

The flowchart and block diagrams in the Figures illustrate thearchitecture, functionality, and operation of possible implementationsof systems, methods, and computer program products according to variousembodiments of the present invention. In this regard, each block in theflowchart or block diagrams may represent a module, segment, or portionof instructions, which comprises one or more executable instructions forimplementing the specified logical function(s). In some alternativeimplementations, the functions noted in the block may occur out of theorder noted in the figures. For example, two blocks shown in successionmay, in fact, be executed substantially concurrently, or the blocks maysometimes be executed in the reverse order, depending upon thefunctionality involved. It will also be noted that each block of theblock diagrams and/or flowchart illustration, and combinations of blocksin the block diagrams and/or flowchart illustration, can be implementedby special purpose hardware-based systems that perform the specifiedfunctions or acts or carry out combinations of special purpose hardwareand computer instructions.

Embodiments of the invention may be provided to end users through acloud computing infrastructure. Cloud computing generally refers to theprovision of scalable computing resources as a service over a network.More formally, cloud computing may be defined as a computing capabilitythat provides an abstraction between the computing resource and itsunderlying technical architecture (e.g., servers, storage, networks),enabling convenient, on-demand network access to a shared pool ofconfigurable computing resources that can be rapidly provisioned andreleased with minimal management effort or service provider interaction.Thus, cloud computing allows a user to access virtual computingresources (e.g., storage, data, applications, and even completevirtualized computing systems) in “the cloud,” without regard for theunderlying physical systems (or locations of those systems) used toprovide the computing resources.

While the foregoing is directed to embodiments of the present invention,other and further embodiments of the invention may be devised withoutdeparting from the basic scope thereof, and the scope thereof isdetermined by the claims that follow.

What is claimed is:
 1. A computer system, comprising: a hardware platform comprising a plurality of components including a processor, a system memory, and a plurality of input/output (IO) devices, the processor including a controller having a trace and optimize function controller (TOF), wherein at least one component of the processor, the system memory, and the plurality of IO devices is controlled by one or more out-of-band utilities, wherein the one or more out-of-band utilities provide out-of-band control settings to the at least one component; and a software platform including the one or more out-of-band utilities and an operating system (OS) executing on the hardware platform; wherein the TOF is configured to communicate with the processor, the system memory, the plurality of IO devices, and the one or more out-of-band utilities to obtain respective current settings thereof, wherein the obtained current settings comprise the out-of-band control settings for the at least one component, and to determine optimized final settings for the processor, the system memory, and the plurality of IO devices based on combining the obtained current settings, wherein the optimized final settings determined by the TOF prevent the controller from overriding the out-of-band control settings for the at least one component by the controller; and wherein the controller is configured to control the processor, the system memory, and the plurality of IO devices based on the optimized final settings.
 2. The computer system of claim 1, wherein the hardware platform includes a baseboard management controller (BMC), and wherein the controller is configured to obtain user settings from the BMC.
 3. The computer system of claim 1, wherein the controller is configured to obtain user settings from the OS.
 4. The computer system of claim 1, wherein the TOF is configured to generate the optimized final settings based on the obtained current settings and user settings.
 5. The computer system of claim 1, wherein the software platform includes one or more utilities configured to control one or more parameters of the hardware platform out-of-band with respect to the controller.
 6. The computer system of claim 1, wherein the hardware platform includes voltage regulation modules (VRMs), and wherein the TOF is configured to communicate with the VRMs.
 7. The computer system of claim 1, wherein the TOF is configured to monitor the hardware platform to determine whether the optimized final settings are being maintained.
 8. A method of controlling devices in a computer system, the method comprising: communicating, by a trace and optimize function controller (TOF) in a controller of a hardware platform in the computer system, with a processor, a system memory, a plurality of input/output (IO) devices, and one or more out-of-band utilities on a software platform in the computer system, to obtain respective current settings thereof, wherein the computer system comprises a plurality of components, wherein the plurality of components includes the processor, the system memory, and the plurality of IO devices, wherein at least one component of the processor, the system memory, and the plurality of IO devices is controlled by the one or more out-of-band utilities, wherein the one or more out-of-band utilities provide out-of-band control settings to the at least one component, and wherein the obtained current settings comprise the out-of-band control settings for the at least one component; determining, by the TOF, optimized final settings for the processor, the system memory, and the plurality of IO devices based on combining the obtained current settings, wherein the optimized final settings determined by the TOF prevent the controller from overriding the out-of-band control settings for the at least one component by the controller; and controlling, by the controller, the processor, the system memory, and the plurality of IO devices based on the optimized final settings.
 9. The method of claim 8, wherein the hardware platform includes a baseboard management controller (BMC), and wherein the controller is configured to obtain user settings from the BMC.
 10. The method of claim 8, wherein the controller is configured to obtain user settings from an operating system (OS) executing on the hardware platform.
 11. The method of claim 8, wherein the TOF is configured to generate the optimized final settings based on the obtained current settings and user settings.
 12. The method of claim 8, wherein the computer system includes the software platform comprising the one or more utilities configured to control one or more parameters of the hardware platform out-of-band with respect to the controller.
 13. The method of claim 8, wherein the hardware platform includes voltage regulation modules (VRMs), and wherein the TOF is configured to communicate with the VRMs.
 14. The method of claim 8, wherein the TOF is configured to monitor the hardware platform to determine whether the optimized final settings are being maintained.
 15. A computer program product for controlling devices in a computer system the computer program product comprising: a non-transitory computer-readable storage medium storing a plurality of computer program instructions, the computer program instructions executable by one or more computer processors to: communicate, by a trace and optimize function controller (TOF) in a controller of a hardware platform in the computer system, with a processor, a system memory, a plurality of input/output (IO) devices, and one or more out-of-band utilities on a software platform in the computer system, to obtain respective current settings thereof, wherein the computer system comprises a plurality of components, wherein the plurality of components includes the processor, the system memory, and the plurality of IO devices, wherein at least one component of the processor, the system memory, and the plurality of IO devices is controlled by the one or more out-of-band utilities, wherein the one or more out-of-band utilities provide out-of-band control settings to the at least one component, and wherein the obtained current settings comprise the out-of-band control settings for the at least one component; determine, by the TOF, optimized final settings for the processor, the system memory, and the plurality of IO devices based on combining the obtained current settings, wherein the optimized final settings determined by the TOF prevent the controller from overriding the out-of-band control settings for the at least one component by the controller; and control, by the controller, the processor, the system memory, and the plurality of IO devices based on the optimized final settings.
 16. The computer program product of claim 15, wherein the hardware platform includes a baseboard management controller (BMC), and wherein the controller is configured to obtain user settings from the BMC.
 17. The computer program product of claim 15, wherein the controller is configured to obtain user settings from an operating system (OS) executing on the hardware platform.
 18. The computer program product of claim 15, wherein the TOF is configured to generate the optimized final settings based on the obtained current settings and user settings.
 19. The computer program product of claim 15, wherein the computer system includes the software platform comprising the one or more utilities configured to control one or more parameters of the hardware platform out-of-band with respect to the controller.
 20. The computer program product of claim 15, wherein the hardware platform includes voltage regulation modules (VRMs), and wherein the TOF is configured to communicate with the VRMs. 